Hardware-managed dynamic memory compression controller
This technology lets a computer system automatically decide whether to store data in its memory in a compressed or uncompressed form, and manages which memory tier each piece of data goes into, all in real time based on how much free space is available. Instead of the operating system handling this juggling act in software—which is slow—the hardware itself makes these decisions dynamically, keeping track of free pages across memory levels and routing data accordingly. The result is more efficient use of physical memory without the latency penalty of software-managed compression schemes. Think of it as a smart traffic controller built into the chip that keeps memory lanes flowing optimally.
What you could build
A hardware memory controller or system-on-chip feature that OEMs embed in servers, mobile processors, or embedded devices to boost effective memory capacity without adding DRAM; data center chip designers and mobile SoC vendors would be the buyers.
Who in Virginia should care
Defense contractors and cloud/data center operators in Northern Virginia (AWS, Microsoft, government cloud primes) that rely on memory-intensive workloads would have natural interest in licensing or co-development.
Readiness: Concept
Concept — described but not yet demonstrated. Lab validated — supported by experimental results in the patent. Prototype likely — the text describes a built, working embodiment.
Readiness is inferred from the patent text, not from a lab visit.
The record
- Inventors
- Xun Jian, Gagandeep Panwar, Muhammad Laghari
- Filed
- Patent pending — filed September 30, 2024
- Status
- Application
- Publication number
- US20250110891A1
Ready to talk?
Virginia Tech Intellectual Properties handles licensing for this technology.
Prosim summaries are generated from public patent text and are not legal advice.