Single-layer image-reversal double patterning process
This technology is a smarter way to pattern microscopic features onto semiconductor wafers during chip manufacturing. Normally, photolithography uses a light-sensitive coating exposed through a mask to etch circuit patterns — and getting complex shapes requires multiple costly steps with different materials. This invention uses a single special coating that can behave like two different types of resist depending on whether it has been chemically 'flipped' before a second light exposure. By combining two exposures on that one coating — one before and one after the flip step — engineers can build up complex shapes from simple mask patterns, cutting the number of processing steps roughly in half and avoiding optical distortion artifacts that plague multi-layer approaches.
What you could build
A licensed process module for semiconductor fabs or photomask tool vendors enabling simplified double-patterning at existing equipment nodes; the primary buyers would be CMOS logic and memory fabs using 90–28nm nodes who want to reduce process complexity without purchasing extreme-UV equipment.
Who in Virginia should care
Virginia hosts significant defense electronics and IC packaging work (Micron, Northrop Grumman, BAE Systems presence); a fab-adjacent process licensor or a defense ASIC manufacturer would be the plausible local interest.
Readiness: Lab validated
Concept — described but not yet demonstrated. Lab validated — supported by experimental results in the patent. Prototype likely — the text describes a built, working embodiment.
Readiness is inferred from the patent text, not from a lab visit.
The record
- Inventors
- Coumba Ndoye, Marius Orlowski
- Granted
- August 25, 2015
- Status
- Granted patent
- Patent number
- 9116432
Ready to talk?
Virginia Tech Intellectual Properties handles licensing for this technology.
Prosim summaries are generated from public patent text and are not legal advice.